From Fedora Project Wiki

(Created page with '== More information == <!-- This link helps people navigate back to the main pages, leave as-is. --> The main page for Summer Coding 2010 ideas is [[:Category:Summer Coding 2...')
 
No edit summary
Line 1: Line 1:
== More information ==
== More information ==
<!-- This link helps people navigate back to the main pages, leave as-is. -->
<!-- This link helps people navigate back to the main pages, leave as-is. -->
The main page for [[Summer Coding 2010]] ideas is [[:Category:Summer Coding 2010 ideas]].
The main page for this ideas is [[:Category:Summer Coding 2010 ideas]].


<!-- Fill out the below information with a longer version of the information about your idea. -->
<!-- Fill out the below information with a longer version of the information about your idea. -->
Line 7: Line 7:
<!-- Keep in mind that the work should take fro 6 to 10 weeks (250 to 400 hours). -->
<!-- Keep in mind that the work should take fro 6 to 10 weeks (250 to 400 hours). -->


''Status:'' <!-- One of "Idea", "Proposed", "Accepted" -->
''Status:'' Proposed


''Summary of idea:'' <!-- One to three paragraphs. -->
''Summary of idea:'' <!-- One to three paragraphs. -->
The proposed work is to write the GTK GUI for Digital Gate Compiler (DGC) to use the latest GTK+ 2.0 API. This is Fedora Electronic Lab ticket #73:
  https://fedorahosted.org/fedora-electronic-lab/ticket/73


''Contacts:'' [[User:Shakthimaan| Shakthi Kannan]]
''Contacts:'' [[User:Shakthimaan| Shakthi Kannan]]
Line 15: Line 19:
''Mentor(s):'' [[User:Shakthimaan| Shakthi Kannan]]
''Mentor(s):'' [[User:Shakthimaan| Shakthi Kannan]]


''Notes:'' <!-- If you have more ideas than the summary, include that here. -->
''Notes:''
 
Digital Gate Compiler (DGC) was written by Oliver Kraus in 2003, who is not with Universität Erlangen-Nürnberg anymore.
 
  http://dgc.sourceforge.net/
 
The current maintainer of the project is Tobias Dichtl. His line of scientific research is not the same as that of DGC, but, he said he will be adding "extended burst mode synthesis support" this year. Meanwhile, I had updated the sources with autotools build changes, and released 0.98 for Fedora. The updated changes are available at:
 
  http://git.fedorahosted.org/git/dgc.git
 
The use cases are available at:
 
  http://dgc.sourceforge.net/dgc_tutorial_toc.html#SEC_Contents
 
  * Opening a file with a circuit description
  * Opening a gate (cell) library
  * Editing the encoding parameters
  * Editing the synthesis parameters
  * Editing the library parameters
  * Editing the log level
  * Performing the synthesis
  * Saving (exporting) the syhthesized circuit
  * The log and the error windows
    ** Saving the log window
    ** Clear the log window
    ** Clear the error window


[[Category:Summer Coding 2010 ideas]]
[[Category:Summer Coding 2010 ideas]]

Revision as of 06:22, 11 April 2010

More information

The main page for this ideas is Category:Summer Coding 2010 ideas.


Status: Proposed

Summary of idea:

The proposed work is to write the GTK GUI for Digital Gate Compiler (DGC) to use the latest GTK+ 2.0 API. This is Fedora Electronic Lab ticket #73:

 https://fedorahosted.org/fedora-electronic-lab/ticket/73

Contacts: Shakthi Kannan

Mentor(s): Shakthi Kannan

Notes:

Digital Gate Compiler (DGC) was written by Oliver Kraus in 2003, who is not with Universität Erlangen-Nürnberg anymore.

 http://dgc.sourceforge.net/

The current maintainer of the project is Tobias Dichtl. His line of scientific research is not the same as that of DGC, but, he said he will be adding "extended burst mode synthesis support" this year. Meanwhile, I had updated the sources with autotools build changes, and released 0.98 for Fedora. The updated changes are available at:

 http://git.fedorahosted.org/git/dgc.git

The use cases are available at:

 http://dgc.sourceforge.net/dgc_tutorial_toc.html#SEC_Contents
 * Opening a file with a circuit description
 * Opening a gate (cell) library
 * Editing the encoding parameters
 * Editing the synthesis parameters
 * Editing the library parameters
 * Editing the log level
 * Performing the synthesis
 * Saving (exporting) the syhthesized circuit
 * The log and the error windows 
   ** Saving the log window
   ** Clear the log window
   ** Clear the error window