From Fedora Project Wiki

(I got it)
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=== drawtiming ===  
 
=== drawtiming ===  
 
Rebuild for F15 against drawing release 0.7.1: no up-stream changes
 
Rebuild for F15 against drawing release 0.7.1: no up-stream changes
 +
 
http://drawtiming.sourceforge.net
 
http://drawtiming.sourceforge.net
  
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=== gtkwave ===
 
=== gtkwave ===
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gtkwave is an analysis tool used to perform debugging on Verilog or VHDL simulation models.
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 +
With Fedora 15 '''gtkwave''' has been upgraded to 3.3.18, with improvements and new features respect to the release 3.3.10 present in Fedora 14. Among these there are:
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additions of new tcl functions to enhance Tcl access; added support for process and transaction filters in MinGW and support for Open New Window to MinGW; in order to aid in indexing, detection for Verilog XL-style VCD identifiers in all vcd loaders in gtkwave. For all details and fixes, view the CHANGELOG.TXT in the doc package. 
 +
 
http://gtkwave.sourceforge.net/
 
http://gtkwave.sourceforge.net/
  

Revision as of 14:33, 5 February 2011

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This page is a draft only
It is still under construction and content may change. Do not rely on the information on this page.

Circuit Design

archimedes

Rebuild for F15 against GNU Archimedes release 0.9.1: no up-stream changes

http://www.gnu.org/software/archimedes/


drawtiming

Rebuild for F15 against drawing release 0.7.1: no up-stream changes

http://drawtiming.sourceforge.net


gtkwave

gtkwave is an analysis tool used to perform debugging on Verilog or VHDL simulation models.

With Fedora 15 gtkwave has been upgraded to 3.3.18, with improvements and new features respect to the release 3.3.10 present in Fedora 14. Among these there are: additions of new tcl functions to enhance Tcl access; added support for process and transaction filters in MinGW and support for Open New Window to MinGW; in order to aid in indexing, detection for Verilog XL-style VCD identifiers in all vcd loaders in gtkwave. For all details and fixes, view the CHANGELOG.TXT in the doc package.

http://gtkwave.sourceforge.net/


kicad

https://launchpad.net/kicad


mot-adms

http://mot-adms.sourceforge.net/


ngspice

http://ngspice.sourceforge.net

(tclspice-22-5.cvs20101113.fc15.i686)

pcb

http://pcb.sourceforge.net


perl-Verilog

http://www.veripool.org/wiki/verilog-perl

perl-Hardware-Verilog-Parser-0.13-6.fc15.noarch

perl-Hardware-Vhdl-Lexer-1.00-7.fc15.noarch

perl-Hardware-Vhdl-Parser-0.12-7.fc15.noarch

perl-Hardware-Vhdl-Tidy-0.8-8.fc15.noarch

perl-ModelSim-List-0.06-6.fc15.noarch

perl-Perlilog-0.3-6.fc15.noarch

perl-SystemC-Vregs-1.463-5.fc15.noarch

perl-SystemPerl-1.336-1.fc15.i686

perl-Verilog-CodeGen-0.9.4-5.fc15.noarch

perl-Verilog-Readmem-0.04-5.fc15.noarch