Documentation Circuit Design Beat: Difference between revisions

Revision as of 09:13, 13 February 2015

Beat is open
This beat is now ready to have Fedora 25 content added by the beat writer

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-{{header|docs}}
+{{header|docs}}{{Docs_beat_open}}
-{{Docs_beat_open}}
-{{Draft}}
-= Circuit Design =
-=== archimedes ===
-http://www.gnu.org/software/archimedes/
-=== drawtiming ===
-http://drawtiming.sourceforge.net
-=== gtkwave ===
-http://gtkwave.sourceforge.net/
-=== kicad ===
-https://launchpad.net/kicad
-=== mot-adms ===
-http://mot-adms.sourceforge.net/
-=== ngspice ===
-http://ngspice.sourceforge.net
-(tclspice-22-5.cvs20101113.fc15.i686)
-=== pcb ===
-http://pcb.sourceforge.net
-=== perl-Verilog ===
-http://www.veripool.org/wiki/verilog-perl
-perl-Hardware-Verilog-Parser-0.13-6.fc15.noarch
-perl-Hardware-Vhdl-Lexer-1.00-7.fc15.noarch
-perl-Hardware-Vhdl-Parser-0.12-7.fc15.noarch
-perl-Hardware-Vhdl-Tidy-0.8-8.fc15.noarch
-perl-ModelSim-List-0.06-6.fc15.noarch
-perl-Perlilog-0.3-6.fc15.noarch
-perl-SystemC-Vregs-1.463-5.fc15.noarch
-perl-SystemPerl-1.336-1.fc15.i686
-perl-Verilog-CodeGen-0.9.4-5.fc15.noarch
-perl-Verilog-Readmem-0.04-5.fc15.noarch
 [[Category:Docs Project]]
 [[Category:Draft documentation]]
 [[Category:Documentation beats]]