Architectures/RISC-V

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RISC-V (pronounced "RISC Five") is an open source instruction set architecture (ISA). This project, informally called Fedora/RISC-V, aims to provide a complete Fedora experience on the RISC-V (64 bit, RV64G) architecture.

Status April 2017 The port is usable as-is. But we are waiting for glibc and the kernel support to go upstream. At that point we will re-bootstrap the whole project using the final ABIs. This is expected to happen in the next few months.

Status November 2016 The port supports about two thirds of the packages in Fedora 25, so it is quite complete and ready to use. Most important command-line programs just work (and even a few graphical ones). However if you are using your own hardware then you will need to supply a compatible kernel and bootloader and just use the Fedora userspace. Fedora/RISC-V does not support 32 bit or embedded hardware.

Topics

Downloads

https://fedorapeople.org/groups/risc-v/
Disk images, RPMs, SRPMs. Log files and status from the autobuilder.
https://github.com/rwmjones/fedora-riscv-autobuild
The autobuilder source.
https://github.com/rwmjones/fedora-riscv-stage4
Scripts used to build the stage4 disk image.
https://github.com/rwmjones/fedora-riscv-kernel
Linux kernel build scripts and patches
http://copr-fe.cloud.fedoraproject.org/coprs/rjones/riscv/
The COPR repository (for Fedora 24/x86_64) containing: QEMU, Spike, cross-compiler toolchain (obsolete)

Bootstrapping is over so the following links are now obsolete:

https://github.com/rwmjones/fedora-riscv
Git repository containing the bootstrapping work. Read the README file!
http://oirase.annexia.org/riscv/
Interim stage3 disk images built by rwmj
http://davidlt.web.cern.ch/davidlt/riscv/
Interim stage3 disk and kernel images built by davidlt.

Communications

On FreeNode IRC: #fedora-riscv

There is no specific mailing list, use the general Fedora developers' mailing list.